kaddarorin samfur:
TYPE | BAYANI |
category | Haɗin kai (IC) Abun ciki - FPGA (Tsarin Ƙofar Ƙofar Mai Shiryewa) |
masana'anta | AMD Xilinx |
jerin | Spartan®-6 LX |
Kunshin | tire |
samfurin hali | a hannun jari |
Adadin LAB/CLB | 1139 |
Adadin abubuwan dabaru/raka'a | 14579 |
Jimlar RAM ɗin | 589824 |
I/O ƙidaya | 232 |
Ƙarfin wutar lantarki - Ƙarfafawa | 1.14V ~ 1.26V |
nau'in shigarwa | Nau'in Dutsen Surface |
Yanayin aiki | -40°C ~ 100°C (TJ) |
Kunshin / Rushewa | 324-LFBGA, CSPBGA |
Kunshin na'urar mai bayarwa | 324-CSPBGA (15x15) |
Lambar samfurin asali | Saukewa: XC6SLX16 |
bayar da rahoton bug
Sabuwar Binciken Parametric
Rarraba muhalli da fitarwa:
SIFFOFI | BAYANI |
Matsayin RoHS | Mai yarda da ƙayyadaddun ROHS3 |
Matsayin Ji daɗin Danshi (MSL) | 3 (168 hours) |
Matsayin ISAR | Kayayyakin da ba su isa ba |
ECN | 3A991D |
HTSUS | 8542.39.0001 |
Bayanan kula:
1. Duk ƙarfin lantarki suna da alaƙa da ƙasa.
2. Duba Ayyukan Interface don Ƙwayoyin Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwaƙwalwar Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwaƙwalwa ) ta Ƙaddamar da Ƙaddamarwa An Ƙayyadaddun Ƙirar Ƙirar Ƙirar Ƙira ba ta amfani da
daidaitaccen kewayon ƙarfin lantarki na VCINT.Ana amfani da daidaitaccen kewayon wutar lantarki na VCINT don:
• Zane-zanen da ba sa amfani da MCB
• Na'urorin LX4
• Na'urori a cikin fakitin TQG144 ko CPG196
• Na'urori masu ma'aunin saurin -3N
3. Matsakaicin raguwar ƙarfin lantarki da aka ba da shawarar don VCCAUX shine 10 mV/ms.
4. A lokacin sanyi, idan VCCO_2 shine 1.8V, to dole ne VCCAUX ya zama 2.5V.
5. Na'urorin -1L suna buƙatar VCCAUX = 2.5V lokacin amfani da LVDS_25, LVDS_33, BLVDS_25, LVPECL_25, RSDS_25, RSDS_33, PPDS_25,
da PPDS_33 I/O ma'auni akan abubuwan da aka shigar.LVPECL_33 bashi da tallafi a cikin na'urorin -1L.
6. Ana adana bayanan saiti ko da VCCO ta faɗi zuwa 0V.
7. Ya haɗa da VCCO na 1.2V, 1.5V, 1.8V, 2.5V, da 3.3V.
8. Don tsarin PCI, mai watsawa da mai karɓa ya kamata su kasance da kayan gama gari don VCCO.
9. Na'urori masu saurin -1L ba sa goyan bayan Xilinx PCI IP.
10. Kada ku wuce jimillar 100mA a kowane banki.
11. Ana buƙatar VBATT don kula da maɓallin AES mai goyon bayan baturi (BBR) lokacin da ba a yi amfani da VCCAUX ba.Da zarar an yi amfani da VCCAUX, VBATT na iya zama
unconnected.Lokacin da ba a yi amfani da BBR ba, Xilinx yana ba da shawarar haɗawa zuwa VCCAUX ko GND.Duk da haka, VBATT na iya zama rashin haɗin kai.Spartan-6 FPGA Data Sheet: DC da Sauyawa Halayen
DS162 (v3.1.1) Janairu 30, 2015
www.xilinx.com
Ƙayyadaddun samfur
4
Tebur 3: Sharuɗɗan Shirye-shiryen eFUSE(1)
Siffar Alamar Min Nau'in Matsakaicin Raka'a
VFS (2)
Samar da wutar lantarki na waje
3.2 3.3 3.4 V
IFS
VFS samar da halin yanzu
- 40 mA
VCCAUX Ƙarfin wutar lantarki mai ƙarfi dangane da GND 3.2 3.3 3.45 V
RFUSE(3) Resistance na waje daga RFUSE fil zuwa GND 1129 1140 1151
Ω
VCINT
Ƙarfin wutar lantarki na ciki dangane da GND 1.14 1.2 1.26 V
tj
Yanayin zafin jiki
15-85 ° C
Bayanan kula:
1. Waɗannan ƙayyadaddun ƙayyadaddun bayanai suna aiki yayin shirye-shiryen maɓallin eFUSE AES.Ana tallafawa shirye-shirye ta hanyar JTAG kawai.Maɓallin AES kawai
goyan bayan na'urori masu zuwa: LX75, LX75T, LX100, LX100T, LX150, da LX150T.
2. Lokacin shirya eFUSE, VFS dole ne ya zama ƙasa da ko daidai da VCCAUX.Lokacin da ba shirye-shirye ko lokacin da ba a yi amfani da eFUSE ba, Xilinx
yana ba da shawarar haɗa VFS zuwa GND.Koyaya, VFS na iya kasancewa tsakanin GND da 3.45 V.
3. Ana buƙatar resistor RFUSE lokacin shirya maɓallin eFUSE AES.Lokacin da ba shirye-shirye ko lokacin da ba a yi amfani da eFUSE ba, Xilinx
yana ba da shawarar haɗa fil ɗin RFUSE zuwa VCCAUX ko GND.Koyaya, RFUSE na iya zama mara haɗin gwiwa.